MDS212 Datasheet, PDF (27/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch

MDS212
Data Sheet
SRAM L_D[31:0]
64Kx32
L_A[18:3]
MDS212
SRAM ^L_D[63:32]
64Kx32
One Bank 0.5M
64Kx32
SRAM
SRAM64Kx32
64Kx32
L_D[31:0]
L_D[31:0]
CE
CE
L_A[18:3]
MDS212
L_A[19]
SRAM
SRAM _64Kx32
64Kx32
L_D[63:32]
L_D[63:32]
Two Bank 1M
64Kx32
SRAM L_D[31:0]
128Kx32
L_A[19:3]
MDS212
SRAM
SRAM _64Kx32
128Kx32
L_D[31:0]
L_D[31:0]
CE
CE
L_A[19:3]
L_A[20]
MDS212
SRAM ^L_D[63:32]
128Kx32
One Bank 1M
128Kx32
SRAM ^L_D[63:32]
SRAM128Kx32
128Kx32
L_D[63:32]
Two Bank 2M
128Kx32
Figure 3 - Frame Buffer Memory Configuration
5.2 Frame Buffer Memory Usage
The MDS212 supports two switching modes: managed and unmanaged. The following tables describe Frame
Buffer Memory usage for managed and unmanaged modes of operation, respectively:
Description
Frame Data Buffer
(FDB)
Transmission
Queue
CPU/HISC Mailing
List
VLAN Table
VLAN MAC Table
Unit Size
1.5 Kbytes
Unit Count
Total Size
256 to 1K 384 K bytes to 1.5M bytes
4 bytes x 128K
to 4 bytes x 1K
32 Bytes to 64
Bytes
(Programmable)
8 bytes x 4K
8 bytes to 32
bytes x 2K
48 (4 level
priority)
128 to 1K
1
1
24 Kbytes to 192Kbytes
(at 4 level priority)
4K bytes to 32 Kbytes
(at 32 Bytes each)
32 Kbytes
16 Kbytes to 64 Kbytes
Reference by
FE¹
FE¹
CPU, HISC & SE ¹
HISC & SE ¹
HISC & SE ¹
Note: FE = Frame Engine, SE = Search Engine
Table 2 - Frame Buffer Memory Usage for Managed Mode
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