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MDS212 Datasheet, PDF (1/111 Pages) Zarlink Semiconductor Inc – 12-Port 10/100Mbps Ethernet Switch | |||
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Features
⢠12 10/100Mbps Autosensing, Fast Ethernet ports
with Reduced MII Interface
⢠32-bit wide bi-directional pipe at 100Mhz provides
6.4Gbps pipe to connect two MDS212 chips
⢠Supports up to 3.572 Mpps system throughput
using non-blocking architecture
⢠High performance Layer 2 packet forwarding and
filtering at full wire speed.
⢠Very low latency through single store and forward
at ingress port and cut-through switching at
destination ports
⢠Port Trunking and Load Sharing for high
bandwidth links between switches
⢠On-chip address lookup engine and memory for
up to 2K MAC addresses
⢠up to 64K using management CPU memory
⢠Supports up to 4k MAC addresses with 24 ports
(2-chip solution)
⢠Up to 16K using external buffer memory
⢠Parallel Flash interface for fast self initialization
⢠Supports packet filtering and port security
⢠System wide filtering
⢠Static MAC destination and source address
filtering
⢠VLAN for multicast/broadcast filtering
⢠Protocol filtering
⢠Local port filtering
⢠Aging control for secure MAC addresses
⢠Provides 256-port and ID Tagged Virtual LANs
(VLANs) 802.1Q
MDS212
12-Port 10/100Mbps
Ethernet Switch
Data Sheet
October 2003
Ordering Information
MDS212CG 456 Pin HSBGA
0°C to 70°C
⢠ID Tagging Insertion/Extraction
⢠Supports IP Multicasting through IGMP Snooping
⢠XpressFlow Quality of Service (QoS), IEEE
802.1p, supports 4 Level transmission priorities,
weighted fair queuing based packet scheduling,
user mapping of priority levels and weights
⢠Full duplex Ethernet IEEE 803.2x flow control
minimizes traffic congestion
⢠Supports back-pressure flow control for half
duplex mode
⢠Flooding and Broadcasting control
⢠Link status and TX/RX activity through serial LED
interface
⢠Standard software modules available:
⢠Browser, GUI, and text menu
⢠IEEE 802.1d Spanning Tree Algorithm
⢠SNMP management
⢠Telnet for remote control console
⢠Automatic Booting via TFTP Protocols.
⢠Remote Monitoring (RMON) and storage for a
management agent
⢠IGMP for IP multicast
⢠GVRP, GMRP
⢠Packaged in 456-Pin Ball Grid Array
SDRAM
CPU
Flash
SRAM
CPU Bus
MDS212
MDS212
64 bit
XPipe 32 bit
64 bit
SRAM
12
12
4 x 10/100
Fa4sFxta4FE1saxt0tshE/1t1e0tE0rh/n01tehe0retn0rentet
4 x 10/100
FaFsa4tsEx4t tE1hx0et1h/r10en0/re1n0t0e0t
Fast Ethernet
Figure 1 - 24 10/100Mbps Port System Configuration
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.
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