DS824 Datasheet, PDF (8/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

LogiCORE IP AXI Bus Functional Models (v3.00.a)
Table 3: AXI4 Master BFM Parameters (Cont’d)
BFM Parameters
Description
AWUSER_BUS_WIDTH
Default is 1.
ARUSER_BUS_WIDTH
Default is 1.
RUSER_BUS_WIDTH
Default is 1.
WUSER_BUS_WIDTH
Default is 1.
BUSER_BUS_WIDTH
Default is 1.
MAX_OUTSTANDING_TRANSACTIONS
This defines the maximum number of outstanding transactions. Any attempt to
generate more traffic while this limit has been reached is handled by stalling until
at least one of the outstanding transactions has finished.
Default is 8.
EXCLUSIVE_ACCESS_SUPPORTED
This parameter informs the master that exclusive access is supported by the
slave. A value of 1 means it is supported so the response check expects an
EXOKAY, or else give a warning, in response to an exclusive access. A value of 0
means the slave does not support this so a response of OKAY is expected in
response to an exclusive access.
Default is 1.
WRITE_BURST_DATA_TRANSFER_GAP The configuration variable can be set dynamically during the run of a test. It
controls the gap between the write data transfers that comprise a write data burst.
This value is an integer number and is measured in clock cycles.
Default is 0.
Note: If this is set to a value greater than zero and concurrent read bursts are
called, then the BFM attempts to perform read data interleaving.
WRITE_BURST_ADDRESS_DATA_
PHASE_GAP
This configuration variable can be set dynamically during the run of a test. It
controls the gap between the write address phase and the write data burst inside
the WRITE_BURST task. This value is an integer number and is measured in
clock cycles.
Default is 0.
WRITE_BURST_DATA_ADDRESS_
PHASE_GAP
This configuration variable can be set dynamically during the run of a test. It
controls the gap between the write data burst and the write address phase inside
the WRITE_BURST_CONCURRENT. This enables the user to start the address
phase at anytime during the data burst. This value is an integer number and is
measured in clock cycles.
Default is 0.
RESPONSE_TIMEOUT
This value, measured in clock cycles, is the value used to determine if a task that
is waiting for a response should timeout.
Default is 500 clock cycles.
A value of zero means that the timeout feature is disabled.
STOP_ON_ERROR
This configuration variable is used to enable/disable the stopping of the simulation
on an error condition.
The default value of one stops the simulation on an error.
This configuration variable can be changed during simulation for error testing.
Note: This is not used for timeout errors; such errors always stop simulation.
DS824 July 25, 2012
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Product Specification