DS824 Datasheet, PDF (6/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

LogiCORE IP AXI Bus Functional Models (v3.00.a)
Table 2: AXI3 Slave BFM Parameters (Cont’d)
BFM Parameters
Description
MEMORY_MODEL_MODE
The parameter puts the slave BFM into a simple memory model mode. This means
that the slave BFM automatically responds to all transfers and does not require any
of the API functions to be called by the test.
The memory mode is very simple and only supports aligned and normal INCR
transfers. Narrow transfers are not supported, and WRAP and FIXED bursts are
also not supported.
The size and address range of the memory are controlled by the parameters
SLAVE_ADDRESS and SLAVE_MEM_SIZE.
The value 1 enables this memory model mode. A value of 0 disables it.
Default is 0.
The slave channel level API and function level API should not be used while this
mode is active.
EXCLUSIVE_ACCESS_SUPPORTED
This parameter informs the slave that exclusive access is supported. A value of 1
means it is supported so the automatic generated response is an EXOKAY to
exclusive accesses. A value of 0 means the slave does not support this so a
response of OKAY is automatically generated in response to exclusive accesses.
Default is 1.
READ_BURST_DATA_TRANSFER_GAP The configuration variable controls the gap between the read data transfers that
comprise a read data burst. This value is an integer number and is measured in
clock cycles.
Default is 0.
Note: If this is set to a value greater than zero and concurrent read bursts are
called, read data interleaving occurs. The depth of this data interleaving depends
on the number of parallel writes being performed.
This configuration variable can be changed during simulation.
WRITE_RESPONSE_GAP
This configuration variable controls the gap, measured in clock cycles, between the
reception of the last write transfer and the write response.
Default is 0.
Note: This configuration variable can be changed during simulation.
READ_RESPONSE_GAP
This configuration variable controls the gap, measured in clock cycles, between the
reception of the read address transfer and the start of the first read data transfer.
Default is 0.
Note: This configuration variable can be changed during simulation.
RESPONSE_TIMEOUT
This configuration variable, measured in clock cycles, is the value used to
determine if a task that is waiting for a response should timeout.
Default = 500 clock cycles.
A value of zero means that the timeout feature is disabled. This configuration
variable can be changed during simulation.
STOP_ON_ERROR
This configuration variable is used to enable/disable the stopping of the simulation
on an error condition.
The default value of one stops the simulation on an error.
This configuration variable can be changed during simulation for error testing.
Note: This is not used for timeout errors; such errors always stop simulation.
DS824 July 25, 2012
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Product Specification