DS824 Datasheet, PDF (49/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

LogiCORE IP AXI Bus Functional Models (v3.00.a)
6. Check User Logic Master Support in IPIF Services tab if an AXI4-based master IP is needed, and then click
Next until the Peripheral Simulation Support tab.
X-Ref Target - Figure 9
Figure 9: Select Master Support
7. Check Generate BFM simulation platform and Next.
X-Ref Target - Figure 10
Figure 10: Generate Simulation Platform
8. Click Next and Finish.
Figure 11 shows the directory structure of the generated AXI4-based IP (named my_axi_ip).
DS824 July 25, 2012
www.xilinx.com
49
Product Specification