DS824 Datasheet, PDF (50/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

X-Ref Target - Figure 11
LogiCORE IP AXI Bus Functional Models (v3.00.a)
Figure 11: CIP Wizard Output Directory Structure
The AXI BFM simulation can be run from \devl\bfmsim.
Running AXI BFM Simulation with ModelSim
This section describes how to run AXI BFM simulation on the generated AXI-based IP within ModelSim.
1. Start XPS and open the BFM_SYSTEM project in the directory \devl\bfmsim.
Xilinx has provided AXI BFM wrapper files to be used with AXI-based IP BFM simulations. When an AXI-based
master/slave IP is generated, a corresponding AXI BFM core is added to assist in developing the custom core.
In this example, “User Logic Master Support” is enabled. Therefore, my_axi_ip has an AXI4 Master interface
and an AXI4-Lite Slave interface, which is connected through an AXI4 bus and AXI4-Lite bus interface, respectively.
In the AXI BFM simulation directory, the simulation uses AXI4_MASTER_BFM_WRAPPER,
AXI4_LITE_MASTER_BFM_WRAPPER and AXI4_SLAVE_BFM_WRAPPER for the simulation. Figure 12 shows
the XPS GUI.
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Figure 12: XPS CIP AXI BFM Project
2. Click Simulation -> Launch HDL Simulator to launch ModelSim (assuming the EDK and BFM libraries have
been properly compiled within ModelSim simulator).
3. Copy the test bench file (bfm_system_tb.v) from \devl\bfmsim\scripts to
\devl\bfmsim\simulation\behavioral.
4. Make run.do script and save it in \devl\bfmsim\simulation\behavioral.
DS824 July 25, 2012
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Product Specification