DS824 Datasheet, PDF (16/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

LogiCORE IP AXI Bus Functional Models (v3.00.a)
Table 9: Utility API Tasks/Functions (Cont’d)
API Task/Function Name and Description
Inputs
set_write_burst_data_address_phase_gap
This function sets the AXI4 FULL MASTER
WRITE_BURST_DATA_ADDRESS_PHASE_GAP
internal control variable to the specified input value.
GAP_LENGTH: An integer value
measured in clock cycles.
None
set_packet_transfer_gap
This function sets the AXI4 Streaming MASTER
PACKET_TRANSFER_GAP internal control variable
to the specified input value.
GAP_LENGTH: An integer value
measured in clock cycles.
None
set_bfm_clk_delay
This task sets the internal variable
BFM_CLK_DELAY to the specified input value. This
is used to move the BFM internal clock off the
simulation clock edge if needed. The default value is
zero. If used it must be applied to each BFM
separately.
CLK_DELAY: An integer value
used for the #BFM_CLK_DELAY
on BFM internal clocking.
None
set_task_call_and_reset_handling
This task sets the TASK_RESET_HANDLING
internal variable to the specified input value:
0x0 = Ignore reset and continue to process task
(default)
0x1 = Stall task execution until out of reset and print
info message
0x2 = Issue an error and stop (depending on
STOP_ON_ERROR value)
0x3 = Issue a warning and continue
task_reset_handling: An integer
value used to define BFM behavior
during reset when a channel level
API task is called.
None
remove_pending_transaction
This task is only required if the test writer is using the
channel level API task RECEIVE_READ_DATA
instead of RECEIVE_READ_BURST. The
RECEIVE_READ_DATA does not decrement the
pending transaction counter so this task must be
called manually after the full read data transfer is
complete.
None
None
Outputs
DS824 July 25, 2012
www.xilinx.com
16
Product Specification