DS824 Datasheet, PDF (46/55 Pages) Xilinx, Inc – LogiCORE IP AXI Bus Functional Models (v3.00.a)

LogiCORE IP AXI Bus Functional Models (v3.00.a)
lock_type,data);
end
end
As shown in the code above, it is possible to create the read datapath for a simple memory model using two of the
tasks from the slave channel level API. This is achieved in the following two steps:
1. The first step is to wait for any read address request on the read address bus. This is done by calling
RECEIVE_READ_ADDRESS with IDVALID_FALSE. This ensures that the first detected and valid read address
handshake is recorded and the details are passed back. This task is blocking; so the READ_PATH process does
not proceed until it has found a read address channel transfer.
2. The second step is to take the requested data from the memory array and send it in a read burst. This is done by
extracting the data byte by byte into a data vector which is used as an input into the SEND_READ_BURST task.
Before sending the read data burst, the READ_PATH process waits for the clock cycles determined in the
internal control variable READ_RESPONSE_GAP.
Using AXI BFM for Embedded Designs with XPS
For Xilinx Platform Studio (XPS)-based systems, pcore wrappers around the AXI BFMs are provided under
Verification in the EDK Install IP catalog. Additionally, the XPS Create IP (CIP) Wizard creates simple example
projects. See Getting Started with EDK and AXI BFM, page 48 for detailed steps.
This section only applies to AXI BFM cores that are instantiated inside the EDK XPS project with the following
requirements:
• Xilinx EDK and AXI BFM Licenses
• Supported simulator
Adding AXI BFMs to EDK
The AXI BFMs are wrapped into EDK pcores to allow easy integration into an XPS project. The BFMs are added and
connected to an EDK system in the same way other Xilinx AXI-based IP cores: add the core to the project,
parameterize the core, then connect the ‘Bus Interface’ of the related AXI interface to the rest of the system.
See Configuration Options, page 3 for more information on the BFM-specific parameters on the pcores. Additional
parameters exist in the XPS Core Config GUI under the Interconnect Settings for BUSIF tab to modify the
function of an attached AXI Interconnect block. For more information on these parameters, see [Ref 1].
Providing Stimulus
User control/stimulus for the AXI BFMs is provided by making function calls to a hierarchy-specific AXI BFM core
instance. For example, to initiate a write burst transaction with a AXI4 Master BFM, the WRITE_BURST()
function-level API command might be issued in the test bench:
dut. my_master0.my_master0.cdn_axi4_master_bfm_inst.WRITE_BURST(arguments);
This command specifies the hierarchy of the AXI BFM instance, and stimulates the core to perform the write burst
with the address, data and other transfer qualifiers specified in the arguments, as documented in Test Writing API,
page 15.
DS824 July 25, 2012
www.xilinx.com
46
Product Specification