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DS692 Datasheet, PDF (7/41 Pages) Xilinx, Inc – Radiation-Hardened
Radiation-Hardened, Space-Grade Virtex-5QV FPGA Data Sheet: DC and AC Switching Characteristics
Table 14: GTX_DUAL Tile Quiescent Supply Current
Symbol
Description
Typ(1)
Units
IAVTTTXQ Quiescent MGTAVTTTX (transmitter termination) supply current
8.2
mA
IAVCCPLLQ Quiescent MGTAVCCPLL (PLL) supply current
0.8
mA
IAVTTRXQ Quiescent MGTAVTTRX (receiver termination) supply current. Includes MGTAVTTRXCQ.
1.2
mA
IAVCCQ Quiescent MGTAVCC (analog) supply current
9.0
mA
Notes:
1. Typical values are specified at nominal voltage, 25°C.
2. Device powered and unconfigured.
3. Currents for conditions other than values specified in this table can be obtained by using the Xilinx Power Estimator (XPE) tool.
4. GTX_DUAL tile quiescent supply current for an entire device can be calculated by multiplying the values in this table by the number of
GTX_DUAL tiles used.
GTX_DUAL Tile DC Input and Output Levels
Table 15 summarizes the DC output specifications of the GTX_DUAL tiles in Virtex-5QV FPGAs. Figure 1 shows the
single-ended output voltage swing. Figure 2 shows the peak-to-peak differential output voltage.
Consult UG198: Virtex-5 FPGA RocketIO GTX Transceiver User Guide for further details.
Table 15: GTX_DUAL Tile DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max Units
DVPPIN
Differential peak-to-peak input External AC coupled ≤ 4.25 Gb/s
voltage
200
–
1800
mV
Absolute input voltage
VIN
DC coupled
MGTAVTTRX = 1.2V
–400
–
MGTAVTTRX mV
+400 up to
1320
VCMIN
Common mode input voltage DC coupled
MGTAVTTRX = 1.2V
–
800
–
mV
DVPPOUT
Differential peak-to-peak output TXBUFDIFFCTRL = 111
voltage(1)
–
–
1400
mV
VSEOUT
Single-ended output voltage
swing(1)
TXBUFDIFFCTRL = 111
–
–
700
mV
VCMOUT
Common mode output voltage Equation based
MGTAVTTTX = 1.2V
1200 – DVPPOUT/2
mV
RIN
ROUT
TOSKEW
CEXT
Differential input resistance
Differential output resistance
Transmitter output skew
Recommended external AC coupling capacitor(2)
85
100
120
Ω
85
100
120
Ω
–
2
8
ps
75
100
200
nF
Notes:
1. The output swing and preemphasis levels are programmable using the attributes discussed in UG198: Virtex-5 FPGA RocketIO GTX
Transceiver User Guide and can result in values lower than reported in this table.
2. Values outside of this range can be used as appropriate to conform to specific protocols and standards.
X-Ref Target - Figure 1
+V
P
N
0
Figure 1: Single-Ended Output Voltage Swing
VSEOUT
DS692_01_031210
DS692 (v1.3.1) January 16, 2015
Product Specification
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