DS692 Datasheet, PDF (11/41 Pages) Xilinx, Inc – Radiation-Hardened

Radiation-Hardened, Space-Grade Virtex-5QV FPGA Data Sheet: DC and AC Switching Characteristics
Table 22: GTX_DUAL Tile Receiver Switching Characteristics
Symbol
Description
Min Typ Max Units
F_GTXRX
Serial data rate
RX oversampler not enabled
RX oversampler enabled
0.75
0.15
– F_GTXMAX Gb/s
–
0.75 Gb/s
T_RXELECIDLE
TIme for RXELECIDLE to respond to
loss or restoration of data
OOBDETECT_THRESHOLD = 110
–
–
75
ns
R_XOOBVDPP OOB detect threshold peak-to-peak OOBDETECT_THRESHOLD = 110
55
–
R_XSST
Receiver spread-spectrum
tracking⁽¹⁾
Modulated @ 33 KHz
–5000 –
135
mV
0
ppm
R_XRL
R_XPPMTOL
Run length (CID)
Data/REFCLK PPM offset
tolerance⁽²⁾
Internal AC capacitor bypassed
CDR 2^nd-order loop disabled
CDR 2^nd-order loop enabled
SJ Jitter Tolerance⁽³⁾
JT_SJ_6.5
Sinusoidal Jitter⁽⁴⁾
JT_SJ_5.0
Sinusoidal Jitter⁽⁴⁾
JT_SJ_4.25
Sinusoidal Jitter⁽⁴⁾
JT_SJ_3.75
Sinusoidal Jitter⁽⁴⁾
JT_SJ_3.2
Sinusoidal Jitter⁽⁴⁾
JT_SJ_3.2L
Sinusoidal Jitter⁽⁴⁾
JT_SJ_2.5
Sinusoidal Jitter⁽⁴⁾
JT_SJ_1.25
Sinusoidal Jitter⁽⁴⁾
JT_SJ₇₅₀
Sinusoidal Jitter⁽⁴⁾⁽⁶⁾
JT_SJ₁₅₀
Sinusoidal Jitter⁽⁴⁾⁽⁶⁾
SJ Jitter Tolerance with Stressed Eye⁽³⁾
6.5 Gb/s
5.0 Gb/s
4.25 Gb/s
3.75 Gb/s
3.2 Gb/s
3.2 Gb/s⁽⁵⁾
2.5 Gb/s
1.25 Gb/s
750 Mb/s
150 Mb/s
JT_TJSE_4.25
JT_SJSE_4.25
Total Jitter with Stressed Eye⁽⁷⁾
4.25 Gb/s
Sinusoidal Jitter with Stressed Eye⁽⁷⁾ 4.25 Gb/s
–
–
–200
–
–2000 –
0.44
–
0.44
–
0.44
–
0.44
–
0.45
–
0.45
–
0.50
–
0.50
–
0.57
–
0.57
–
0.69
–
0.1
–
512
UI
200
ppm
2000 ppm
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
–
UI
Notes:
1. Using PLL_RXDIVSEL_OUT = 1, 2, and 4.
2. Indicates the maximum offset between the receiver reference clock and the serial data. For example, a reference clock with ±100 ppm
resolution results in a maximum offset of 200 ppm between the reference clock and the serial data.
3. All jitter values are based on a Bit Error Ratio of 1e^–12.
4. Using 80 MHz sinusoidal jitter only in the absence of deterministic and random jitter.
5. PLL frequency at 1.6 GHz and OUTDIV = 1.
6. GREFCLK can be used for serial data rates up to 1.0 Gb/s, but performance is not guaranteed.
7. Composite jitter with RX equalizer enabled. DFE disabled.
DS692 (v1.3.1) January 16, 2015
Product Specification
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