DS823 Datasheet, PDF (15/33 Pages) Xilinx, Inc – DIP-4 and DIP-2 parity generation and verification

LogiCORE IP SPI-4.2 v12.2
Table 5: Sink Static Configuration Parameter Definition (Cont’d)
Name
Range
Description
SnkCalendar_Len[8:0]
0-511
(effective range
1-512)
Sink Calendar Length. The SnkCalendar_Len parameter
sets the length of the calendar sequence.
The core implements this parameter as a static register
programmed by the AXI4-Lite interface, and it can be updated
in circuit by first deasserting SnkEn.
Note that the Sink Calendar Length equals SnkCalendar_Len
+ 1. For example, if SnkCalendar_Len=15, the Sink Calendar
Length will be equal to 16.
SnkAFThresNegate[8:0]
Sink Almost Full Threshold Negate.
SnkAFThresAssert Defines the minimum number of empty FIFO locations that
to 508
exist when SNKFF_ALMOSTFULL_N is deasserted. Note
Values less than that the negate threshold must be greater or equal to the
SnkAFThresAssert assert threshold (SnkAFThresAssert).
get set to
SnkAFThresAsset.
Values greater than
508 get set to 508.
When SNKFF_ALMOSTFULL_N is deasserted, the core
stops sending flow control (deasserts
SNKFF_ALMOSTFULL_N) and resumes transmission of valid
FIFO status levels. This indicates to the transmitting device
that additional data can be sent.
SnkAFThresAssert[8:0]
1-508
Values less than 1
get set to 1.
Values greater than
508 get set to 508.
Sink Almost Full Threshold Assert. Defines the minimum
number of empty FIFO locations that exist when
SNKFF_ALMOSTFULL_N is asserted. The assert threshold
must be less than or equal to the negate threshold
(SnkAFThresNegate).
When SNKFF_ALMOSTFULL_N is asserted, the core
initiates the flow control mechanism selected by the parameter
FifoAFMode. The FifoAFMode defines when the interface
stops sending valid FIFO status levels and begins sending
flow control information on RStat. This indicates to the
transmitting device that the core is almost full and additional
data cannot be sent.
RSClkDiv
Sink Status Clock Divide. Used to determine if the RSClk is
1/4 of the data rate, which is compliant with the OIF
specification, or 1/8 of the data rate, which is required by some
n/a
PHY ASSPs:
0: RSClkDiv = 1/4 rate (default value)
1: RSClkDiv = 1/8 rate
DS823 July 25, 2012
www.xilinx.com
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Product Specification