DS90UH947-Q1 Datasheet, PDF (67/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

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ADD
(dec)
196
ADD
(hex)
0xC4
Register Name
HDCP_STS
DS90UH947-Q1
SNLS455 – NOVEMBER 2014
Table 10. Serial Control Bus Registers (continued)
Bit(s)
7
6
5
4
3
2
1
0
Register
Type
R
R
R
R
R
R
R
R
Default
(hex)
0x00
Function
Description
I2C_ERR_DET
RX_INT
RX_LOCK_DET
DOWN_HPD
RX_DETECT
KSV_LIST_RDY
KSV_RDY
AUTHED
HDCP I2C Error Detected: This bit indicates an error was detected on
the embedded communications channel with the HDCP Receiver.
Setting of this bit might indicate that a problem exists on the link
between the HDCP Transmitter and HDCP Receiver. This bit will be
cleared on read.
RX Interrupt : Status of the RX Interrupt signal. The signal is received
from the attached HDCP Receiver and is the status on the INTB_IN
pin of the HDCP Receiver. The signal is active low, so a 0 indicates
an interrupt condition.
Receiver Lock Detect : This bit indicates that the downstream
Receiver has indicated Receive Lock to incoming serial data.
Downstream Hot Plug Detect: This bit indicates a downstream
repeater has reported a Hot Plug event, indicating addition of a new
receiver. This bit will be cleared on read.
Receiver Detect : This bit indicates that a downstream Receiver has
been detected.
HDCP Repeater KSV List Ready : This bit indicates that the Receiver
KSV list has been read and is available in the KSV_FIFO registers.
The device will wait for the controller to set the KSV_LIST_VALID bit
in the HDCP_CTL register before continuing. This bit will be cleared
once the controller sets the KSV_LIST_VALID bit.
HDCP Receiver KSV Ready : This bit indicates that the Receiver KSV
has been read and is available in the HDCP_BKSV registers. If the
de-vice is not a Repeater, it will wait for the controller to set the
KSV_VALID bit in the HDCP_CTL register before continuing. This bit
will be cleared once the controller sets the KSV_VALID bit.
HDCP Authenticated: Indicates the HDCP authentication has
completed successfully. The controller may now send video data re-
quiring content protection. This bit will be cleared if authentication is
lost or if the controller restarts authen-tication.
Copyright © 2014, Texas Instruments Incorporated
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