DS90UH947-Q1 Datasheet, PDF (54/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

DS90UH947-Q1
SNLS455 – NOVEMBER 2014
ADD
(dec)
90
ADD
(hex)
0x5A
Register Name
DUAL_STS
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Table 10. Serial Control Bus Registers (continued)
Bit(s)
7
6
5:4
3
2
1
0
Register
Type
R
R
R
R
R
R
R
Default
(hex)
0x00
Function
Description
FPD3_LINK_RD
Y
FPD3_TX_STS
FPD3_PORT_S
TS
OLDI_CLK_DET
OLDI_PLL_LOC
K
NO_OLDI_CLK
FREQ_STABLE
FPD-Link III Ready: This bit indicates that the FPD-Link III has
detected a valid downstream connection and determined capabilities
for the downstream link.
FPD-Link III transmit status:
This bit indicates that the FPD-Link III transmitter is active and the
receiver is LOCKED to the transmit clock. It is only asserted once a
valid input has been detected, and the FPD-Link III transmit
connection has entered the correct mode (Single vs. Dual mode).
FPD-Link III Port Status: If FPD3_TX_STS is set to a 1, this field
indicates the port mode status as follows:
00: Dual FPD-Link III Transmitter mode.
01: Single FPD-Link III Transmit on port 0.
10: Single FPD-Link III Transmit on port 1.
11: Replicate FPD-Link III Transmit on both ports.
OpenLDI clock detect indication from the OpenLDI PLL controller.
OpenLDI PLL lock status:
Indicates the OpenLDI PLL has locked to the incoming OpenLDI
clock.
No OpenLDI clock detected:
This bit indicates the Frequency Detect Circuit did not detect an
OpenLDI clock greater than the value specified in the FREQ_LOW
register.
OLDI Frequency is stable:
Indicates the Frequency Detection circuit has detected a stable OLDI
clock frequency.
54
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