DS90UH947-Q1 Datasheet, PDF (34/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

DS90UH947-Q1
SNLS455 – NOVEMBER 2014
www.ti.com
8.4.2.3 Replicate Mode
In this mode, the FPD-Link III TX operates as a 1:2 HDCP Repeater. A second HDCP core is implemented to
support HDCP authentication and encryption to independent HDCP-capable receivers. The same video (up to
85MHz, 24-bit color) is delivered to each receiver.
Replicate mode may be automatically configured when connected to two independent Deserializers.
8.4.2.4 Auto-Detection of FPD-Link III Modes
The DS90UH947-Q1 automatically detects the capabilities of downstream links and can resolve whether a single
device, dual-capable device, or multiple single link devices are connected.
In addition to the downstream device capabilities, the DS90UH947-Q1 will be able to detect the OpenLDI pixel
clock frequency to select the proper operating mode.
If the DS90UH947-Q1 detects two independent devices, it will operate in Replicate mode, sending the single
channel video on both connections. If the device detects a device on the secondary link, but not the first, it can
send the video only on the second link.
Auto-detection can be disabled to allow forced modes of operation using the Dual Link Control Register
(DUAL_CTL1).
8.5 Programming
8.5.1 Serial Control Bus
This serializer may also be configured by the use of a I2C compatible serial control bus. Multiple devices may
share the serial control bus (up to 8 device addresses supported). The device address is set via a resistor divider
(R1 and R2 — see Figure 31 below) connected to the IDx pin.
VDD18
HOST
SCL
SDA
VDDI2C
R1
VR2
IDx
4.7k
4.7k
R2
SER
SCL
SDA
To other
Devices
Figure 31. Serial Control Bus Connection
The serial control bus consists of two signals, SCL and SDA. SCL is a Serial Bus Clock Input. SDA is the Serial
Bus Data Input / Output signal. Both SCL and SDA signals require an external pull-up resistor to V_DD18 or V_DD33.
For most applications, a 4.7kΩ pull-up resistor is recommended. However, the pull-up resistor value may be
adjusted for capacitive loading and data rate requirements. The signals are either pulled High, or driven Low.
The IDx pin configures the control interface to one of 8 possible device addresses. A pull-up resistor and a pull-
down resistor may be used to set the appropriate voltage on the IDx input pin See Table 10 below.
#
Ratio
V_R2 / V_DD18
1
0
2
0.212
3
0.327
4
0.442
5
0.557
Table 9. Serial Control Bus Addresses For IDx
Ideal V_R2
(V)
0
0.381
0.589
0.795
1.002
Suggested Resistor Suggested Resistor
R1 kΩ (1% tol)
R2 kΩ (1% tol)
OPEN
40.2
133
35.7
147
71.5
115
90.9
90.9
115
7-Bit Address
0x0C
0x0E
0x10
0x12
0x14
8-Bit Address
0x18
0x1C
0x20
0x24
0x28
34
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