DS90UH947-Q1 Datasheet, PDF (25/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

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Sample Rate (kHz)
48
96
192
32
44.1
48
96
192
DS90UH947-Q1
SNLS455 – NOVEMBER 2014
Table 5. Audio Interface Frequencies (continued)
I2S Data Word Size (bits)
24
24
24
32
32
32
32
32
I2S CLK (MHz)
2.304
4.608
9.216
2.048
2.822
3.072
6.144
12.288
8.3.13.1.1 I2S Transport Modes
By default, audio is packetized and transmitted during video blanking periods in dedicated Data Island Transport
frames. Data Island frames may be disabled from control registers if Forward Channel Frame Transport of I2S
data is desired. In this mode, only I2S_DA is transmitted to a DS90UH928Q-Q1,DS90UH940-Q1, or
DS90UH948-Q1 deserializer. If connected to a DS90UH926Q-Q1 deserializer, I2S_DA and I2S_DB are
transmitted. Surround Sound Mode, which transmits all four I2S data inputs (I2S_D[A..D]), may only be operated
in Data Island Transport mode. This mode is only available when connected to a DS90UH928Q-Q1,DS90UH940-
Q1, or DS90UH948-Q1 deserializer.
8.3.13.1.2 I2S Repeater
I2S audio may be fanned-out and propagated in the repeater application. By default, data is propagated via Data
Island Transport during the video blanking periods. If frame transport is desired, then the I2S pins should be
connected from the deserializer to all serializers. Activating surround sound at the top-level deserializer
automatically configures downstream serializers and deserializers for surround sound transport utilizing Data
Island Transport. If 4-channel operation utilizing I2S_DA and I2S_DB only is desired, this mode must be explicitly
set in each serializer and deserializer control register throughout the repeater tree (Table 10).
8.3.13.2 TDM Audio Interface
In addition to the I2S audio interface, the DS90UH947-Q1 serializer also supports TDM format. Since a number
of specifications for TDM format are in common use, the DS90UH947-Q1 offers flexible support for word length,
bit clock, number of channels to be multiplexed, etc. For example, let’s assume that word clock signal (I2S_WC)
period = 256 * bit clock (I2S_CLK) time period. In this case, the DS90UH947-Q1 can multiplex 4 channels with
maximum word length of 64 bits each, or 8 channels with maximum word length of 32 bits each. Figure 23
illustrates the multiplexing of 8 channels with 24 bit word length, in a format similar to I2S.
I2S_WC
t1/fS (256 BCKs at Single Rate, 128 BCKs at Dual Rate)t
I2S_CLK
I²S Mode
DIN1
(Single)
Ch 1
t32 BCKst
23 22 0
Ch 2
t32 BCKst
23 22 0
Ch 3
t32 BCKst
23 22 0
Ch 4
t32 BCKst
23 22 0
Ch 5
t32 BCKst
23 22 0
Ch 6
t32 BCKst
23 22 0
Ch 7
t32 BCKst
23 22 0
Ch 8
t32 BCKst
23 22 0
23 22
Figure 23. TDM Format
8.3.14 HDCP Repeater
The supported Repeater application provides a mechanism to extend transmission over multiple links to multiple
display devices.
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