DS90UH947-Q1 Datasheet, PDF (4/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

DS90UH947-Q1
SNLS455 – NOVEMBER 2014
Pin Name
LFOLDI
Pin #
63
FPD-Link III Serial Pins
DOUT0-
26
DOUT0+
27
DOUT1-
22
DOUT1+
23
LF
20
Control Pins
SDA
48
SCL
47
I2CSEL
13
IDx
19
MODE_SEL0
18
MODE_SEL1
32
PDB
31
INTB
49
REM_INTB
10
SPI Pins
MOSI
46
MISO
45
SPLK
44
SS
43
High Speed GPIO Pins
D_GPIO0
46
D_GPIO1
45
D_GPIO2
44
D_GPIO3
43
GPIO Pins
I/O, Type
Analog
Pin Functions (continued)
Description
OpenLDI Loop Filter
Connect to a 10nF capacitor to GND
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I/O
I/O
I/O
I/O
Analog
FPD-Link III Inverting Output 0
The output must be coupled with a 33nF capacitor
FPD-Link III True Output 0
The output must be coupled with a 33nF capacitor
FPD-Link III Inverting Output 1
The output must be coupled with a 33nF capacitor
FPD-Link III True Output 1
The output must be coupled with a 33nF capacitor
FPD-Link III Loop Filter
Connect to a 10nF capacitor to GND
IO, Open-Drain I2C Data Input / Output Interface
Open drain. Must have an external pull-up resistor to 1.8V or 3.3V. DO NOT FLOAT.
Recommended pull-up: 4.7kΩ.
IO, Open-Drain I2C Clock Input / Output Interface
Open drain. Must have an external pull-up resistor to 1.8V or 3.3V. DO NOT FLOAT.
Recommended pull-up: 4.7kΩ.
I, LVCMOS
I2C Voltage Level Strap Option
Tie to V_DDIO with a 10kΩ resistor for 1.8V I2C operation.
Leave floating for 3.3V I2C operation.
This pin is read as an input at power up.
I, Analog
I2C Address Select
External pull-up to VDD18 is required under all conditions. DO NOT FLOAT.
Connect to external pull-up and pull-down resistors to create a voltage divider.
Analog
Mode Select 0 Input. Refer to Table 7.
Analog
Mode Select 1 Input. Refer to Table 8.
I, LVCMOS Power-Down Mode Input Pin
O, Open-Drain
O, LVCMOS
Remote interrupt
INTB = H, Normal Operation
INTB = L, Interrupt Request
Recommended pull-up: 4.7kΩ to V_DDIO. DO NOT FLOAT.
LVCMOS Output
REM_INTB will directly mirror the status of the INTB_IN signal from the remote device. No
separate serializer register read will be required to reset and change the status of this pin.
IO, LVCMOS
IO, LVCMOS
IO, LVCMOS
IO, LVCMOS
SPI Master Output Slave Input
Only available in Dual Link Mode. Shared with D_GPIO0
SPI Master Input Slave Output
Only available in Dual Link Mode. Shared with D_GPIO1
SPI Clock
Only available in Dual Link Mode. Shared with D_GPIO2
SPI Slave Select
Only available in Dual Link Mode. Shared with D_GPIO3
IO, LVCMOS
IO, LVCMOS
IO, LVCMOS
IO, LVCMOS
High Speed GPIO0
Only available in Dual Link Mode. Shared with MOSI
High Speed GPIO1
Only available in Dual Link Mode. Shared with MISO
High Speed GPIO2
Only available in Dual Link Mode. Shared with SPLK
High Speed GPIO3
Only available in Dual Link Mode. Shared with SS
4
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