DS90UH947-Q1 Datasheet, PDF (46/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP

DS90UH947-Q1
SNLS455 – NOVEMBER 2014
ADD
(dec)
20
ADD
(hex)
0x14
Register Name
BIST Control
21
0x15 I2C Voltage Select
22
0x16 BCC Watchdog
Control
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Table 10. Serial Control Bus Registers (continued)
Bit(s)
7:3
2:1
0
7:0
7:1
0
Register
Type
RW
R
RW
RW
RW
Default
(hex)
0x00
0x01
0xFE
Function
OSC Clock
Source
BIST Enable
I2C Voltage
Select
Timer Value
Timer Control
Description
Reserved.
Allows choosing different OSC clock frequencies for forward channel
frame.
OSC Clock Frequency in Functional Mode when PCLK is not present
and 0x03[2]=1.
00: 50MHz Oscillator.
01: 50 MHz Oscillator.
10: 100 MHz Oscillator.
11: 25 MHz Oscillator.
Clock Source in BIST mode i.e. when 0x14[0]=1.
00: External Pixel Clock.
01: 50 MHz Oscillator.
10: 100 MHz Oscillator.
11: 25 MHz Oscillator.
BIST control:
0: Disabled (default).
1: Enabled.
Selects 1.8 or 3.3V for the I2C_SDA and I2C_SCL pins. This register
is loaded from the I2C_VSEL strap option from the I2CSEL pin at
power-up. At power-up, a logic LOW will select 3.3V operation, while a
logic HIGH (pull-up resistor attached) will select 1.8V signaling.
Reads of this register return the status of the I2C_VSEL control:
0: Select 1.8V signaling.
1: Select 3.3V signaling.
This bit may be overwritten via register access or via eFuse program
by writing an 8-bit value to this register:
Write 0xb5 to set I2C_VSEL.
Write 0xb6 to clear I2C_VSEL.
The watchdog timer allows termination of a control channel
transaction if it fails to complete within a programmed amount of time.
This field sets the Bidirectional Control Channel Watchdog Timeout
value in units of 2 milliseconds. This field should not be set to 0.
Disable Bidirectional Control Channel (BCC) Watchdog Timer:
0: Enable BCC Watchdog Timer operation (default).
1: Disable BCC Watchdog Timer operation.
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