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DS90UH947-Q1 Datasheet, PDF (20/87 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer with HDCP
DS90UH947-Q1
SNLS455 – NOVEMBER 2014
www.ti.com
HSCC_MODE
(on DES)
000
011
010
001
Mode
Normal
Fast
Fast
Fast
Table 2. Back Channel D_GPIO Effective Frequency
Number of
D_GPIOs
Samples per
Frame
D_GPIO Effective Frequency(1) (kHz)
5 Mbps BC(2) 10 Mbps BC(3) 20 Mbps BC(4)
4
1
33
66
133
4
6
200
400
800
2
10
333
666
1333
1
15
500
1000
2000
(1) The effective frequency assumes the worst case back channel frequency (-20%) and a 4X sampling rate.
(2) 5 Mbps corresponds to BC FREQ SELECT = 0 & BC_HS_CTL = 0 on deserializer.
(3) 10 Mbps corresponds to BC FREQ SELECT = 1 & BC_HS_CTL = 0 on deserializer.
(4) 20 Mbps corresponds to BC FREQ SELECT = X & BC_HS_CTL = 1 on deserializer.
D_GPIOs
Allowed
D_GPIO[3:0]
D_GPIO[3:0]
D_GPIO[1:0]
D_GPIO0
8.3.10.3 GPIO_REG[8:5] Configuration
GPIO_REG[8:5] are register-only GPIOs and may be programmed as outputs or read as inputs through local
register bits only. Where applicable, these bits are shared with I2S pins and will override I2S input if enabled into
GPIO_REG mode. See Table 3 for GPIO enable and configuration.
Note: Local GPIO value may be configured and read either through local register access, or remote register
access through the Bidirectional Control Channel. Configuration and state of these pins are not transported from
serializer to deserializer as is the case for GPIO[3:0].
Description
GPIO_REG8
GPIO_REG7
GPIO_REG6
GPIO_REG5
GPIO3
GPIO2
GPIO1
GPIO0
Table 3. GPIO_REG and GPIO Local Enable and Configuration
Register Configuration
0x11[7:4] = 0x01
0x11[7:4] = 0x09
0x11[7:4] = 0x03
0x11[3:0] = 0x1
0x11[3:0] = 0x9
0x11[3:0] = 0x3
0x10[7:4] = 0x1
0x10[7:4] = 0x9
0x10[7:4] = 0x3
0x10[3:0] = 0x1
0x10[3:0] = 0x9
0x10[3:0] = 0x3
0x0F[3:0] = 0x1
0x0F[3:0] = 0x9
0x0F[3:0] = 0x3
0x0E[7:4] = 0x1
0x0E[7:4] = 0x9
0x0E[7:4] = 0x3
0x0E[3:0] = 0x1
0x0E[3:0] = 0x9
0x0E[3:0] = 0x3
0x0D[3:0] = 0x1
0x0D[3:0] = 0x9
0x0D[3:0] = 0x3
Function
Output, L
Output, H
Input, Read: 0x1D[0]
Output, L
Output, H
Input, Read: 0x1C[7]
Output, L
Output, H
Input, Read: 0x1C[6]
Output, L
Output, H
Input, Read: 0x1C[5]
Output, L
Output, H
Input, Read: 0x1C[3]
Output, L
Output, H
Input, Read: 0x1C[2]
Output, L
Output, H
Input, Read: 0x1C[1]
Output, L
Output, H
Input, Read: 0x1C[0]
20
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