LM3S1G21 Datasheet, PDF (633/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Stellaris^® LM3S1G21 Microcontroller
Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014
The ADCEMUX selects the event (trigger) that initiates sampling for each sample sequencer. Each
sample sequencer can be configured with a unique trigger source.
ADC Event Multiplexer Select (ADCEMUX)
ADC0 base: 0x4003.8000
Offset 0x014
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
EM3
EM2
EM1
EM0
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:12
Name
reserved
EM3
Type
RO
R/W
Reset
0x0000
0x0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SS3 Trigger Select
This field selects the trigger source for Sample Sequencer 3.
The valid configurations for this field are:
Value Event
0x0
Processor (default)
The trigger is initiated by setting the SSn bit in the ADCPSSI
register.
0x1
Analog Comparator 0
This trigger is configured by the Analog Comparator Control
0 (ACCTL0) register (page 833).
0x2
Analog Comparator 1
This trigger is configured by the Analog Comparator Control
1 (ACCTL1) register (page 833).
0x3
reserved
0x4
External (GPIO PB4)
This trigger is connected to the GPIO interrupt for PB4 (see
“ADC Trigger Source” on page 407).
0x5
Timer
In addition, the trigger must be enabled with the TnOTE bit
in the GPTMCTL register (page 552).
0x6
reserved
0x7
reserved
0x8
reserved
0x9
reserved
0xA-0xE reserved
0xF
Always (continuously sample)
January 22, 2012
633
Texas Instruments-Production Data