LM3S1G21 Datasheet, PDF (362/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Micro Direct Memory Access (μDMA)
Table 8-13. μDMA Register Map (continued)
Offset Name
Type
Reset
Description
0xFFC DMAPCellID3
RO
0x0000.00B1 DMA PrimeCell Identification 3
See
page
398
8.5 μDMA Channel Control Structure
The μDMA Channel Control Structure holds the transfer settings for a μDMA channel. Each channel
has two control structures, which are located in a table in system memory. Refer to “Channel
Configuration” on page 343 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. Each channel has a primary
and alternate structure. The primary control structures are located at offsets 0x0, 0x10, 0x20 and
so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and so on.
362
January 22, 2012
Texas Instruments-Production Data