LM3S1G21 Datasheet, PDF (262/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

System Control
Register 37: Software Reset Control 1 (SRCR1), offset 0x044
This register allows individual modules to be reset. Writes to this register are masked by the bits in
the Device Capabilities 2 (DC2) register.
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
31
30
29
28
27
reserved EPI0
reserved
Type RO
R/W
RO
RO
RO
Reset
0
0
0
0
0
15
14
13
12
11
reserved
I2C1
reserved
I2C0
Type RO
R/W
RO
R/W
RO
Reset
0
0
0
0
0
26
25
24
23
COMP1 COMP0
RO
R/W
R/W
RO
0
0
0
0
10
9
8
7
reserved
RO
RO
RO
RO
0
0
0
0
22
21
reserved
RO
RO
0
0
6
5
SSI1
RO
R/W
0
0
20
19
18
17
16
TIMER3 TIMER2 TIMER1 TIMER0
RO
R/W
R/W
R/W
R/W
0
0
0
0
0
4
SSI0
R/W
0
3
2
1
0
reserved UART2 UART1 UART0
RO
R/W
R/W
R/W
0
0
0
0
Bit/Field
31
30
29:26
25
24
23:20
19
18
Name
reserved
EPI0
reserved
COMP1
COMP0
reserved
TIMER3
TIMER2
Type
RO
R/W
RO
R/W
R/W
RO
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EPI0 Reset Control
When this bit is set, EPI module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 1 Reset Control
When this bit is set, Analog Comparator module 1 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Analog Comp 0 Reset Control
When this bit is set, Analog Comparator module 0 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 3 Reset Control
Timer 3 Reset Control. When this bit is set, General-Purpose Timer
module 3 is reset. All internal data is lost and the registers are returned
to their reset states. This bit must be manually cleared after being set.
Timer 2 Reset Control
When this bit is set, General-Purpose Timer module 2 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
262
January 22, 2012
Texas Instruments-Production Data