LM3S1G21 Datasheet, PDF (23/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Stellaris^® LM3S1G21 Microcontroller
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EPI General-Purpose Configuration 2 (EPIGPCFG2), offset 0x014 ................................... 510
EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 511
EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 513
EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 513
EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 514
EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 514
EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 515
EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 515
EPI Status (EPISTAT), offset 0x060 ................................................................................ 517
EPI Read FIFO Count (EPIRFIFOCNT), offset 0x06C ...................................................... 519
EPI Read FIFO (EPIREADFIFO), offset 0x070 ................................................................ 520
EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074 .................................................... 520
EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078 .................................................... 520
EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C ................................................... 520
EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080 .................................................... 520
EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084 .................................................... 520
EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088 .................................................... 520
EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C ................................................... 520
EPI FIFO Level Selects (EPIFIFOLVL), offset 0x200 ........................................................ 521
EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204 ...................................................... 523
EPI Interrupt Mask (EPIIM), offset 0x210 ......................................................................... 524
EPI Raw Interrupt Status (EPIRIS), offset 0x214 .............................................................. 525
EPI Masked Interrupt Status (EPIMIS), offset 0x218 ........................................................ 527
EPI Error and Interrupt Status and Clear (EPIEISC), offset 0x21C .................................... 528
General-Purpose Timers ............................................................................................................. 530
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 547
Register 2: GPTM Timer A Mode (GPTMTAMR), offset 0x004 ........................................................... 548
Register 3: GPTM Timer B Mode (GPTMTBMR), offset 0x008 ........................................................... 550
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 552
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 555
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 557
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 560
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 563
Register 9: GPTM Timer A Interval Load (GPTMTAILR), offset 0x028 ................................................ 565
Register 10: GPTM Timer B Interval Load (GPTMTBILR), offset 0x02C ................................................ 566
Register 11: GPTM Timer A Match (GPTMTAMATCHR), offset 0x030 .................................................. 567
Register 12: GPTM Timer B Match (GPTMTBMATCHR), offset 0x034 ................................................. 568
Register 13: GPTM Timer A Prescale (GPTMTAPR), offset 0x038 ....................................................... 569
Register 14: GPTM Timer B Prescale (GPTMTBPR), offset 0x03C ...................................................... 570
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 571
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 572
Register 17: GPTM Timer A (GPTMTAR), offset 0x048 ....................................................................... 573
Register 18: GPTM Timer B (GPTMTBR), offset 0x04C ....................................................................... 574
Register 19: GPTM Timer A Value (GPTMTAV), offset 0x050 ............................................................... 575
Register 20: GPTM Timer B Value (GPTMTBV), offset 0x054 .............................................................. 576
Watchdog Timers ......................................................................................................................... 577
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 581
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 582
January 22, 2012
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