LM3S1G21 Datasheet, PDF (608/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Analog-to-Digital Converter (ADC)
Figure 13-3. Sample Averaging Example
A+B+C+D
4
A+B+C+D
4
INT
13.3.4
Analog-to-Digital Converter
The Analog-to-Digital Converter (ADC) module uses a Successive Approximation Register (SAR)
architecture to deliver a 12-bit, low-power, high-precision conversion value. The ADC defaults to a
10-bit conversion result, providing backwards compatibility with previous generations of Stellaris
microcontrollers. To enable 12-bit resolution, set the RES bit in the ADC Control (ADCCTL) register.
The successive-approximation algorithm uses a current mode D/A converter to achieve lower settling
time, resulting in higher conversion speeds for the A/D converter. In addition, built-in sample-and-hold
circuitry with offset-calibration circuitry improves conversion accuracy. The ADC must be run from
the PLL or a 16-MHz clock source. Figure 13-4 shows the ADC input equivalency diagram; for
parameter values, see “Analog-to-Digital Converter (ADC)” on page 910.
608
January 22, 2012
Texas Instruments-Production Data