LM3S1G21 Datasheet, PDF (6/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Table of Contents
8.3.3
8.3.4
8.3.5
8.4
8.5
8.6
Configuring a Peripheral for Simple Transmit ................................................................ 356
Configuring a Peripheral for Ping-Pong Receive ............................................................ 358
Configuring Channel Assignments ................................................................................ 360
Register Map .............................................................................................................. 360
μDMA Channel Control Structure ................................................................................. 362
μDMA Register Descriptions ........................................................................................ 369
9
9.1
9.2
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.3
9.4
9.5
General-Purpose Input/Outputs (GPIOs) ........................................................... 399
Signal Description ....................................................................................................... 399
Functional Description ................................................................................................. 404
Data Control ............................................................................................................... 405
Interrupt Control .......................................................................................................... 406
Mode Control .............................................................................................................. 407
Commit Control ........................................................................................................... 407
Pad Control ................................................................................................................. 408
Identification ............................................................................................................... 408
Initialization and Configuration ..................................................................................... 408
Register Map .............................................................................................................. 409
Register Descriptions .................................................................................................. 412
10 External Peripheral Interface (EPI) ..................................................................... 455
10.1 EPI Block Diagram ...................................................................................................... 456
10.2 Signal Description ....................................................................................................... 457
10.3 Functional Description ................................................................................................. 459
10.3.1 Non-Blocking Reads .................................................................................................... 460
10.3.2 DMA Operation ........................................................................................................... 461
10.4 Initialization and Configuration ..................................................................................... 461
10.4.1 SDRAM Mode ............................................................................................................. 462
10.4.2 Host Bus Mode ........................................................................................................... 466
10.4.3 General-Purpose Mode ............................................................................................... 477
10.5 Register Map .............................................................................................................. 485
10.6 Register Descriptions .................................................................................................. 486
11
11.1
11.2
11.3
11.3.1
11.3.2
11.3.3
11.3.4
11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.5
11.6
General-Purpose Timers ...................................................................................... 530
Block Diagram ............................................................................................................ 530
Signal Description ....................................................................................................... 531
Functional Description ................................................................................................. 534
GPTM Reset Conditions .............................................................................................. 535
Timer Modes ............................................................................................................... 535
DMA Operation ........................................................................................................... 541
Accessing Concatenated Register Values ..................................................................... 542
Initialization and Configuration ..................................................................................... 542
One-Shot/Periodic Timer Mode .................................................................................... 542
Real-Time Clock (RTC) Mode ...................................................................................... 543
Input Edge-Count Mode ............................................................................................... 543
Input Edge Timing Mode .............................................................................................. 544
PWM Mode ................................................................................................................. 545
Register Map .............................................................................................................. 545
Register Descriptions .................................................................................................. 546
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January 22, 2012
Texas Instruments-Production Data