LM3S1G21 Datasheet, PDF (612/955 Pages) Texas Instruments – Stellaris® LM3S1G21 Microcontroller

Analog-to-Digital Converter (ADC)
13.3.5
Differential Sampling
In addition to traditional single-ended sampling, the ADC module supports differential sampling of
two analog input channels. To enable differential sampling, software must set the Dn bit in the
ADCSSCTL0n register in a step's configuration nibble.
When a sequence step is configured for differential sampling, the input pair to sample must be
configured in the ADCSSMUXn register. Differential pair 0 samples analog inputs 0 and 1; differential
pair 1 samples analog inputs 2 and 3; and so on (see Table 13-4 on page 612). The ADC does not
support other differential pairings such as analog input 0 with analog input 3.
Table 13-4. Differential Sampling Pairs
Differential Pair
0
1
2
3
Analog Inputs
0 and 1
2 and 3
4 and 5
6 and 7
The voltage sampled in differential mode is the difference between the odd and even channels:
∆V (differential voltage) = V_{IN_EVEN} (even channel) – V_{IN_ODD} (odd channel), therefore:
■ If ∆V = 0, then the conversion result = 0x1FF for 10-bit and 0x7FF for 12-bit
■ If ∆V > 0, then the conversion result > 0x1FF (range is 0x1FF–0x3FF) for 10-bit and > 0x7FF
(range is 0x7FF - 0xFFF) for 12-bit
■ If ∆V < 0, then the conversion result < 0x1FF (range is 0–0x1FF) for 10-bit and < 0x7FF (range
is 0 - 0x7FF) for 12-bit
The differential pairs assign polarities to the analog inputs: the even-numbered input is always
positive, and the odd-numbered input is always negative. In order for a valid conversion result to
appear, the negative input must be in the range of ± 1.5 V of the positive input. If an analog input
is greater than 3 V or less than 0 V (the valid range for analog inputs), the input voltage is clipped,
meaning it appears as either 3 V or 0 V , respectively, to the ADC.
Figure 13-8 on page 613 shows an example of the negative input centered at 1.5 V. In this
configuration, the differential range spans from -1.5 V to 1.5 V. Figure 13-9 on page 613 shows an
example where the negative input is centered at 0.75 V, meaning inputs on the positive input saturate
past a differential voltage of -0.75 V because the input voltage is less than 0 V. Figure
13-10 on page 614 shows an example of the negative input centered at 2.25 V, where inputs on the
positive channel saturate past a differential voltage of 0.75 V since the input voltage would be greater
than 3 V.
612
January 22, 2012
Texas Instruments-Production Data