RIVA128ZX Datasheet, PDF (81/85 Pages) STMicroelectronics – 128-BIT 3D MULTIMEDIA ACCELERATOR

128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128ZX
Byte offsets 0x4B - 0x48
0x4B
0x4A
0x49
0x48
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AGP Status Register (0x4B - 0x48 = CAP_PTR+4)
Bits
31:24
23:10
9
8:2
1:0
Function
The RQ field contains the maximum number of AGP command requests this
device can have outstanding.
RQ = 0x04
Reserved
SBA indicates whether the RIVA128ZX supports sideband addressing.
0 = Sideband addressing not supported
Reserved
RATE indicates the data transfer rate(s) supported by the RIVA128ZX.
11 = 66MHz 1x supported; 133MHz 2x supported
RWI
R - 0x04
R-0
R-0
R-0
R - 0x11
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