RIVA128ZX Datasheet, PDF (49/85 Pages) STMicroelectronics – 128-BIT 3D MULTIMEDIA ACCELERATOR

128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128ZX
Figure 54. CD write cycle - terminated by slave in middle of transfer
MPCLK
MPFRAME#
MP_AD[7:0] A0
D0
D1
D2 XXX
A0
D3
D4
MPDTACK#
MPSTOP#
Figure 55. CD write cycle - terminated by slave on byte 31
MPCLK
MPFRAME#
MP_AD[7:0] A0
D0
MPDTACK#
MPSTOP#
D30 XXX
A0
D31
Figure 56. CD write cycle - terminated by slave on byte 32, no effect
MPCLK
MPFRAME#
MP_AD[7:0] A0
D0
MPDTACK#
MPSTOP#
D30 D31
Figure 57. UCD read cycle, terminated by master, throttled by slave
MPCLK
MPFRAME#
MP_AD[7:0] A0
MPDTACK#
D0 XXX
D1
D2
D3
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