RIVA128ZX Datasheet, PDF (66/85 Pages) STMicroelectronics – 128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
NOTES
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2
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4
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7
8
Blanking pedestals are not supported in TV output mode.
VREF = 1.235V, RSET = 147Ω
LSB₈ = 1 LSB of 8-bit resolution DAC
About the midpoint of the distribution of the three DACs
37.5ohm, 30pF load
10% to 90%
Settling to within 2% of full scale deflection
Monotonicity guaranteed
13.6 FREQUENCY SYNTHESIS CHARACTERISTICS
Parameter
Min
XTALIN crystal frequency range
4
Internal VCO frequency
128
Memory clock output frequency
Pixel clock output frequency
Pixel clock output frequency (video displayed)
Synthesizer lock time
Typ.
Max
Units
15
MHz
256
MHz
100
MHz
250
MHz
110
MHz
500
µs
NOTE
1
2
3
A series resonant crystal should be connected to XTALIN
The pixel clock can be programmed to within 0.5% of any target frequency 10 ≤ f_pixclk ≤ 250MHz
The maximum pixel clock frequency when the RIVA128ZX is displaying full motion video
Notes
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2
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