RIVA128ZX Datasheet, PDF (68/85 Pages) STMicroelectronics – 128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
15 REFERENCES
1 RIVA128ZX Turnkey Manufacturing Package TMP, Design Guide, NVIDIA Corp./STMicroelectronics
2 RIVA128ZX Programming Reference Manual, NVIDIA Corp./STMicroelectronics
3 Accelerated Graphics Port Interface Specification, Revision 1.0, Intel Corporation, July 1996
4 PCI Local Bus Specification, revision 2.1, PCI Special Interest Group, June 1995
5 Recommendation 656 of the CCIR, Interfaces for digital component video signals in 525-line and 625-
line television systems, CCIR, 1990
6 Display Data Channel (DDC™) standard, Version 2.0, revision 0, Video Electronics Standards Associ-
ation, April 9th 1996 (Video Electronics Standards Association - http://www.vesa.org)
7 AD722 PAL/NTSC TV Encoder Datasheet, Analog Devices Inc., 1995
8 MK2715 NTSC/PAL Clock Source Datasheet, MicroClock Inc., March 1997
16 ORDERING INFORMATION
Device
RIVA128ZX
RIVA128ZX
Package
300 pin PBGA
300 pin PBGA
Supply format
Trays
Tape and reel
Part number
STG3005A2S
STG3005A2S/TR
68/85