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SI5325C-C-GM Datasheet, PDF (95/178 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCKS
Si53xx-RM
Si53xx
C
CML/
LVDS
Driver
100 
C
40 k
40 k
CKIN +
300 
CKIN _
± VICM
Figure 39. CML/LVDS Termination (1.8, 2.5, 3.3 V)
50 
50 
Driver
Receiver
Figure 40. Center Tap Bypassed Termination
Figure 40 is recommended over a single 100  resistor whenever greater reduction of common-mode noise is
desired. It can be used with any differential termination, either input or output.
CMOS Driver
VDD
R1
33 ohms
VDD
R2
Notes
VDD
VDD
Si53xx
R3
50
150 ohms
R2
VICM
See Table
C1 CKIN+ R5 40 kohm
R4
150 ohms
100 nF
CKIN–
C2
R6 40 kohm
100 nF
3.3 V
2.5 V
1.8 V
100 ohm
49.9 ohm
14.7 ohm
Locate R1 near CMOS driver
Locate other components near Si5317
Recalculate resistor values for other drive strengths
Additional Notes:
1. Attenuation circuit limits overshoot and undershoot.
2. Use only with ~50% duty cycle clock signals.
3. Assumes the CMOS output can drive 8 mA.
Figure 41. CMOS Termination (1.8, 2.5, 3.3 V)
Rev. 1.2
95