SI5325C-C-GM Datasheet, PDF (69/178 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCKS

Si53xx-RM
6.3. Input Clock Configurations (Si5367 and Si5368)
The device supports two input clock configurations based on CK_CONFIG_REG. See "5.5. Frame Synchronization
(Si5366)" on page 57 for additional details.
6.4. Input Clock Control
This section describes the clock selection capabilities (manual input selection, automatic input selection, hitless
switching, and revertive switching). The Si5319, Si5327, and Si5375 support only pin-controlled manual clock
selection. Figure 25 and Figure 26 provide top level overviews of the clock selection logic, though they do not
cover wideband or frame sync applications. Register values are indicated by underscored italics. Note that, when
switching between two clocks, LOL may temporarily go high if the clocks differ in frequency by more than 100 ppm.
CKIN1
CKIN2
LOS/FOS
detect
LOS/FOS
detect
Selected
Clock
CK_PRIORn
4
Clock priority logic
1
CKSEL_REG
0
2
Auto
AUTOSEL_REG
decode
0
Manual
1
CS_CA pin
CK_ACTV_PIN
CKSEL_PIN
Figure 25. Si5324, Si5325, Si5326, Si5327, Si5328, Si5374, and Si5376 Input Clock Selection
Rev. 1.2
69