SI5325C-C-GM Datasheet, PDF (70/178 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCKS

Si53xx-RM
CKIN1
CKIN2
CKIN3
CKIN4
LOS/FOS
detect
LOS/FOS
detect
LOS/FOS
detect
LOS/FOS
detect
8
CK_PRIORn
Clock priority logic
Selected
Clock
2
1
2
CKSEL_REG
2
AUTOSEL_REG
2
0
Auto
decode
Manual
0
2
1
2
CS0_C3A,
CS1_C4A
pins
CKSEL_PIN
Figure 26. Si5367, Si5368, and Si5369 Input Clock Selection
6.4.1. Manual Clock Selection (Si5324, Si5325, Si5326, Si5328, Si5367, Si5368, Si5369, Si5374, and Si5376)
Manual control of input clock selection is available by setting the AUTOSEL_REG[1:0] register bits to 00. In manual
mode, the active input clock is chosen via the CKSEL_REG[1:0] register setting according to Table 29 and
Table 30.
Table 29. Manual Input Clock Selection (Si5367, Si5368, Si5369)
CKSEL_REG[1:0]
Register Bits
Active Input Clock
CK_CONFIG_REG = 0
(CKIN1,2,3,4 inputs)
CK_CONFIG_REG = 1
(CKIN1,3 & CKIN2,4 clock/FSYNC pairs)
00
CKIN1
CKIN1/CKIN3
01
CKIN2
CKIN2/CKIN4
10
CKIN3
Not used
11
CKIN4
Not used
Note: Setting the CKSEL_PIN register bit to one allows the CS [1:0] pins to continue to control input clock selection.
If CS_PIN is set to zero, the CKSEL_REG[1:0] register bits perform the input clock selection function.
70
Rev. 1.2