C8051F850-B-GM Datasheet, PDF (89/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 14.2. ADC0CN1: ADC0 Control 1
Bit
7
6
5
4
3
2
1
0
Name
Reserved
ADCMBE
Type
R
RW
Reset
0
0
0
0
0
0
0
0
SFR Address: 0xB2
Table 14.5. ADC0CN1 Register Bit Descriptions
Bit
Name
Function
7:1
Reserved Must write reset value.
0
ADCMBE Common Mode Buffer Enable.
0: Disable the common mode buffer. This setting should be used only if the tracking time
of the signal is greater than 1.5 us.
1: Enable the common mode buffer. This setting should be used in most cases, and will
give the best dynamic ADC performance. The common mode buffer must be enabled if
signal tracking time is less than or equal to 1.5 us.
92
Preliminary Rev 0.6