C8051F850-B-GM Datasheet, PDF (192/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 21.13. P1: Port 1 Pin Latch
Bit
7
6
5
4
3
2
1
0
Name
P1
Type
RW
Reset
1
1
1
1
1
1
1
1
SFR Address: 0x90 (bit-addressable)
Table 21.16. P1 Register Bit Descriptions
Bit
Name
Function
7:0
P1
Port 1 Data.
Writing this register sets the port latch logic value for the associated I/O pins configured
as digital I/O.
Reading this register returns the logic value at the pin, regardless if it is configured as
output or input.
Note: Port 1 consists of 8 bits (P1.0-P1.7) on QSOP24 packages and 7 bits (P1.0-P1.6) on QFN20 packages and 4 bits
(P1.0-P1.3) on SOIC16 packages.
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Preliminary Rev 0.6