C8051F850-B-GM Datasheet, PDF (190/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 21.11. P1MASK: Port 1 Mask
Bit
7
6
5
4
3
2
1
0
Name
P1MASK
Type
RW
Reset
0
0
0
0
0
0
0
0
SFR Address: 0xEE
Table 21.14. P1MASK Register Bit Descriptions
Bit
Name
Function
7:0
P1MASK Port 1 Mask Value.
Selects P1 pins to be compared to the corresponding bits in P1MAT.
0: P1.x pin logic value is ignored and will cause a port mismatch event.
1: P1.x pin logic value is compared to P1MAT.x.
Note: Port 1 consists of 8 bits (P1.0-P1.7) on QSOP24 packages and 7 bits (P1.0-P1.6) on QFN20 packages and 4 bits
(P1.0-P1.3) on SOIC16 packages.
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Preliminary Rev 0.6