C8051F850-B-GM Datasheet, PDF (237/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Table 24.6. SMBus Status Decoding: Hardware ACK Enabled (EHACK = 1) (Continued)
Values Read
Values to
Write
Current SMbus State
Typical Response Options
0
0
0
A slave byte was transmitted; NACK
received.
No action required (expecting
STOP condition).
0100
0
0
1
A slave byte was transmitted; ACK
received.
Load SMB0DAT with next data
byte to transmit.
0
1
X
A Slave byte was transmitted; error
detected.
No action required (expecting
Master to end transfer).
An illegal STOP or bus error was
0101 0 X X detected while a Slave Transmission Clear STO.
was in progress.
If Write, Set ACK for first data
0
0
X
A slave address + R/W was received;
ACK sent.
byte.
If Read, Load SMB0DAT with
data byte
0010
0
1
X
Lost arbitration as master; slave
address + R/W received; ACK sent.
If Write, Set ACK for first data
byte.
If Read, Load SMB0DAT with
data byte
Reschedule failed transfer
A STOP was detected while
0 0 X addressed as a Slave Transmitter or
0001
Slave Receiver.
0
1
X
Lost arbitration while attempting a
STOP.
0000 0 0 X A slave byte was received.
Clear STO.
No action required (transfer
complete/aborted).
Set ACK for next data byte;
Read SMB0DAT.
Set NACK for next data byte;
Read SMB0DAT.
0010
0
1
X
Lost arbitration while attempting a
repeated START.
Abort failed transfer.
Reschedule failed transfer.
0001
0
1
X
Lost arbitration due to a detected
STOP.
Abort failed transfer.
Reschedule failed transfer.
0000
0
1
X
Lost arbitration while transmitting a
data byte as master.
Abort failed transfer.
Reschedule failed transfer.
0 0 X 0001
0 0 X 0100
0 0 X 0001
00X —
0 0 1 0000
0 0 X 0100
0 0 1 0000
0 0 X 0100
1 0 X 1110
00X —
000 —
0 0 1 0000
0 0 0 0000
00X —
1 0 X 1110
00X —
1 0 X 1110
00X —
1 0 X 1110
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Preliminary Rev 0.6