C8051F850-B-GM Datasheet, PDF (184/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 21.5. P0MASK: Port 0 Mask
Bit
7
6
5
4
3
2
1
0
Name
P0MASK
Type
RW
Reset
0
0
0
0
0
0
0
0
SFR Address: 0xFE
Table 21.8. P0MASK Register Bit Descriptions
Bit
Name
Function
7:0
P0MASK Port 0 Mask Value.
Selects P0 pins to be compared to the corresponding bits in P0MAT.
0: P0.x pin logic value is ignored and will cause a port mismatch event.
1: P0.x pin logic value is compared to P0MAT.x.
190
Preliminary Rev 0.6