C8051F850-B-GM Datasheet, PDF (181/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 21.2. XBR1: Port I/O Crossbar 1
Bit
7
6
5
4
3
2
Name
Reserved
T2E
T1E
T0E
ECIE
Type
R
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
SFR Address: 0xE2
Table 21.5. XBR1 Register Bit Descriptions
Bit
Name
Function
7:6
Reserved Must write reset value.
5
T2E
T2 Enable.
0: T2 unavailable at Port pin.
1: T2 routed to Port pin.
4
T1E
T1 Enable.
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
3
T0E
T0 Enable.
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
2
ECIE PCA0 External Counter Input Enable.
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
1:0
PCA0ME PCA Module I/O Enable Bits.
00: All PCA I/O unavailable at Port pins.
01: CEX0 routed to Port pin.
10: CEX0, CEX1 routed to Port pins.
11: CEX0, CEX1, CEX2 routed to Port pins.
1
0
PCA0ME
RW
0
0
Preliminary Rev 0.6
187