C8051F850-B-GM Datasheet, PDF (256/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Register 25.3. TMOD: Timer 0/1 Mode
Bit
7
Name GATE1
Type
RW
Reset
0
SFR Address: 0x89
Bit
Name
7
GATE1
6
CT1
5:4
T1M
3
GATE0
2
CT0
1:0
T0M
6
5
4
3
2
1
0
CT1
T1M
GATE0
CT0
T0M
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
Table 25.5. TMOD Register Bit Descriptions
Function
Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level.
1: Timer 1 enabled only when TR1 = 1 and INT1 is active as defined by bit IN1PL in reg-
ister IT01CF.
Counter/Timer 1 Select.
0: Timer Mode. Timer 1 increments on the clock defined by T1M in the CKCON register.
1: Counter Mode. Timer 1 increments on high-to-low transitions of an external pin (T1).
Timer 1 Mode Select.
These bits select the Timer 1 operation mode.
00: Mode 0, 13-bit Counter/Timer
01: Mode 1, 16-bit Counter/Timer
10: Mode 2, 8-bit Counter/Timer with Auto-Reload
11: Mode 3, Timer 1 Inactive
Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level.
1: Timer 0 enabled only when TR0 = 1 and INT0 is active as defined by bit IN0PL in reg-
ister IT01CF.
Counter/Timer 0 Select.
0: Timer Mode. Timer 0 increments on the clock defined by T0M in the CKCON register.
1: Counter Mode. Timer 0 increments on high-to-low transitions of an external pin (T0).
Timer 0 Mode Select.
These bits select the Timer 0 operation mode.
00: Mode 0, 13-bit Counter/Timer
01: Mode 1, 16-bit Counter/Timer
10: Mode 2, 8-bit Counter/Timer with Auto-Reload
11: Mode 3, Two 8-bit Counter/Timers
Preliminary Rev 0.6
263