C8051F850-B-GM Datasheet, PDF (26/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
2.6. Analog Peripherals
2.6.1. 12-Bit Analog-to-Digital Converter (ADC0)
The ADC0 module on C8051F85x/86x devices is a Successive Approximation Register (SAR) Analog to Digital
Converter (ADC). The key features of the ADC module are:
Single-ended 12-bit and 10-bit modes.
Supports an output update rate of 200 ksps samples per second in 12-bit mode or 800 ksps samples per
second in 10-bit mode.
Operation in low power modes at lower conversion speeds.
Selectable asynchronous hardware conversion trigger
Output data window comparator allows automatic range checking.
Support for Burst Mode, which produces one set of accumulated data per conversion-start trigger with
programmable power-on settling and tracking time.
Conversion complete and window compare interrupts supported.
Flexible output data formatting.
Includes an internal fast-settling reference with two levels (1.65 V and 2.4 V) and support for external
reference and signal ground.
2.6.2. Low Current Comparators (CMP0, CMP1)
The comparators take two analog input voltages and output the relationship between these voltages (less than or
greater than) as a digital signal. The Low Power Comparator module includes the following features:
Multiple sources for the positive and negative poles, including VDD, VREF, and I/O pins.
Two outputs are available: a digital synchronous latched output and a digital asynchronous raw output.
Programmable hysteresis and response time.
Falling or rising edge interrupt options on the comparator output.
Provide “kill” signal to PCA module.
Comparator 0 can be used to reset the device.
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