C8051F850-B-GM Datasheet, PDF (283/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
28. C2 Interface
C8051F85x/86x devices include an on-chip Silicon Labs 2-Wire (C2) debug interface to allow flash programming
and in-system debugging with the production part installed in the end application. The C2 interface uses a clock
signal (C2CK) and a bi-directional C2 data signal (C2D) to transfer information between the device and a host
system. Details on the C2 protocol can be found in the C2 Interface Specification.
28.1. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and flash
programming may be performed. C2CK is shared with the RST pin, while the C2D signal is shared with a port I/O
pin. This is possible because C2 communication is typically performed when the device is in the halt state, where
all on-chip peripherals and user software are stalled. In this halted state, the C2 interface can safely ‘borrow’ the
C2CK and C2D pins. In most applications, external resistors are required to isolate C2 interface traffic from the
user application. A typical isolation configuration is shown in Figure 28.1.
C8051Fxxx
/Reset (a)
Input (b)
Output (c)
C2CK
C2D
C2 Interface Master
Figure 28.1. Typical C2 Pin Sharing
The configuration in Figure 28.1 assumes the following:
1. The user input (b) cannot change state while the target device is halted.
2. The RST pin on the target device is used as an input only.
Additional resistors may be necessary depending on the specific application.
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