C8051F850-B-GM Datasheet, PDF (114/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
16. Clock Sources and Selection (HFOSC0, LFOSC0, and EXTCLK)
The C8051F85x/86x devices can be clocked from the internal low power 24.5 MHz oscillator, the internal low-
frequency 80 kHz oscillator, or an external CMOS clock signal at the EXTCLK pin. An adjustable clock divider
allows the selected clock source to be post-scaled by powers of 2, up to a factor of 128. By default, the system
clock comes up as the 24.5 MHz oscillator divided by 8.
High Frequency
24.5 MHz
Oscillator
Low Frequency
80 kHz
Oscillator
External Clock
Input (EXTCLK)
Clock Control
Programmable
Divider:
1, 2, 4...128
SYSCLK
To core and
peripherals
Figure 16.1. Clocking Options
16.1. Programmable High-Frequency Oscillator
All C8051F85x/86x devices include a programmable internal high-frequency oscillator that defaults as the system
clock after a system reset. The oscillator is automatically enabled when it is requested. The internal oscillator
period can be adjusted via the OSCICL register. On C8051F85x/86x devices, OSCICL is factory calibrated to
obtain a 24.5 MHz base frequency.
16.2. Programmable Low-Frequency Oscillator
A programmable low-frequency internal oscillator is also included. The low-frequency oscillator is calibrated to a
nominal frequency of 80 kHz. A divider at the oscillator output is capable of dividing the output clock of the module
by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register. Additionally, the OSCLF bits can be used to
coarsely adjust the oscillator’s output frequency.
16.2.1. Calibrating the Internal L-F Oscillator
Timer 3 includes a capture function that can be used to capture the oscillator frequency, when running from a
known time base. When Timer 3 is configured for L-F Oscillator Capture Mode, a rising edge of the low-frequency
oscillator’s output will cause a capture event on the corresponding timer. As a capture event occurs, the current
timer value (TMR3H:TMR3L) is copied into the timer reload registers (TMR3RLH:TMR3RLL). By recording the
difference between two successive timer capture values, the low-frequency oscillator’s period can be calculated.
The OSCLF bits can then be adjusted to produce the desired oscillator frequency.
16.3. External Clock
An external CMOS clock source is also supported by the C8051F85x/86x family. The EXTCLK pin on the device
serves as the external clock input when running in this mode. The EXTCLK input may also be used to clock some
of the digital peripherals (e.g., Timers, PCA, etc.) while SYSCLK runs from one of the internal oscillator sources.
When not selected as the SYSCLK source, the EXTCLK input is always re-synchronized to SYSCLK.
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