SI5380_16 Datasheet, PDF (44/53 Pages) Silicon Laboratories – Ultra-Low Phase Noise, 12-output JESD204B Clock Generator

Pin Name
A0/CSb
Control/Status
INTRb
PDNb
RSTb
OEb
LOLb
SYNCb
IN_SEL0
IN_SEL1
RSVD
Power
VDD
VDD
VDD
VDDA
Pin Number
19
12
5
6
11
47
48
3
4
25
32
46
60
13
Pin Type¹
I
O
I
I
I
O
I
I
I
P
P
P
P
Si5380 Rev D Data Sheet
Pin Description
Function
Address Select 0/Chip Select. This pin functions as the
hardware controlled address A0 in I²C mode. In SPI mode,
this pin functions as the chip select input (active low). This
pin is internally pulled-up.
Interrupt. ² This pin is asserted low when a change in de-
vice status has occurred. This pin must be pulled-up exter-
nally using a resistor of >= 1 kΩ. It should be left unconnec-
ted when not in use.
Power Down. ² The device enters into a low power mode
when this pin is pulled low. This pin is internally pulled-up. It
can be left unconnected when not in use.
Device Reset. ² Active low input that performs power-on re-
set (POR) of the device. Resets all internal logic to a known
state and forces the device registers to their default values.
Clock outputs are disabled during reset. This pin is internal-
ly pulled-up.
Output Enable. ² This pin disables all outputs when held
high. This pin is internally pulled low and can be left uncon-
nected when not in use.
Loss Of Lock. ² This output pin indicates when the DSPLL
is locked (high) or out-of-lock (low). When in use, this pin
must be pulled-up using an external resistor of >= 1 kΩ. It
can be left unconnected when not in use.
Output Clock Synchronization. ² An active low signal on
this pin resets the output dividers for the purpose of re-
aligning the output clocks. This pin is internally pulled-up
and can be left unconnected when not in use.
Input Reference Select. ² The IN_SEL[1:0] pins are used
in manual pin controlled mode to select the active clock in-
put as shown in Table 3.2 Table 6.2 on page 10. These pins
are internally pulled-down and may be left unconnected
when unused.
Reserved. Leave disconnected.
Core Supply Voltage. The device operates from a 1.8 V
supply. A 1 µF bypass capacitor should be placed very
close to each pin.
Core Supply Voltage 3.3 V. This core supply pin requires a
3.3 V power source. A 1 µF bypass capacitor should be
placed very close to this pin.
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