SI5380_16 Datasheet, PDF (40/53 Pages) Silicon Laboratories – Ultra-Low Phase Noise, 12-output JESD204B Clock Generator

Si5380 Rev D Data Sheet
Typical Operating Characteristics (Phase Noise & Jitter)
Figure 8.3. Input = 61.44 MHz; Output = 245.76 MHz, 3.3 V LVPECL
Figure 8.4. Input = 61.44 MHz; Output = 122.88 MHz, 3.3 V LVPECL
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