SI5335 Datasheet, PDF (30/47 Pages) Silicon Laboratories – WEB-CUSTOMIZABLE, ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR/BUFFER

Si5335
3.10.4. LVDS Outputs
The LVDS output option provides a very simple and power-efficient interface that requires no external biasing when
connected to an LVDS receiver. An ac-coupled LVDS driver is often useful as a CML driver. The LVDS driver may
be dc-coupled or ac-coupled to the receiver in 3.3 V or 2.5 V output mode.
3.10.4.1. AC-Coupled LVDS Outputs
The Si5335 LVDS output can drive an ac-coupled load. The ac coupling capacitors may be placed at either the
driver or receiver end, as long as they are placed prior to the 100  termination resistor. Keep the 100 
termination resistor as close to the receiver as possible, as shown in Figure 19. When a 1.8 V output supply
voltage is used, the LVDS output of the Si5335 produces a common-mode voltage of ~0.875 V, which does not
support the LVDS standard. In this case, it is best to ac-couple the output to the load.
Si5335
3.3 V or 2.5 V
V_DDOx
LVDS
CLKxA
CLKxB
Keep termination close to
the receiver
50
100 
50
LVDS
Si5335
DC-Coupled LVDS Output
3.3 V, 2.5 V, or 1.8 V
V_DDOx
LVDS
CLKxA
CLKxB
Keep termination close to
the receiver
0.1 µF
50
100 
50
0.1 µF
AC-Coupled LVDS Output
Figure 19. Interfacing to an LVDS Receiver
30
Rev. 1.4