SI5335 Datasheet, PDF (23/47 Pages) Silicon Laboratories – WEB-CUSTOMIZABLE, ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR/BUFFER

Si5335
3.4.5. Applying a Single-Ended Clock to the Differential Input Clock Pins
It is possible to interface any single-ended clock signal to the differential input pins (XA/CLKIN, XB/CLKINB). The
recommended interface for a signal that requires a 50  load is shown in Figure 12. On these inputs, it is important
that the signal level be less than 1.2 V_PP SE and greater than 0.4 V_PP SE. The maximum recommended input
frequency in this case is 350 MHz.
0.4 to 1.2V pk-pk
Keep termination close to
input pin of the Si5335
0.1 uF
50
50
Si5335
Pin 1
Pin 2
0.1 uF
Figure 12. Single-Ended Input Signal with 50  Termination
3.5. Input and Output Frequency Configuration
The Si5335 utilizes a single PLL-based architecture, four independent MultiSynth fractional output dividers, and a
MultiSynth fractional feedback divider such that a single device provides the clock generation capability of 4
independent PLLs. Unlike competitive multi-PLL solutions, the Si5335 can generate four unique non-integer
related output frequencies with 0 ppm frequency error for any combination of output frequencies. In addition, any
combination of output frequencies can be generated from a single reference frequency without having to change
the crystal or reference clock frequency between frequency configurations.
The Si5335 frequency configuration is set when the device configuration is specified using the ClockBuilder web-
based utility available at www.silabs.com/ClockBuilder. Any combination of output frequencies ranging from 1 to
350 MHz can be configured on each of the device outputs. Up to three unique device configurations can be
specified in a single device, enabling the Si5335 to replace 3 different clock generators or clock buffers.
3.6. Multi-Function Control Inputs
The Si5335 supports five user-defined input pins (pins 3, 5, 6, 12, 19) that are customizable to support the
functions listed below. The pinout of each device is customized using the ClockBuilder utility. This enables the
device to be custom tailored to a specific application. Each of the different functions is described in further detail
below.
Table 14. Multi-Function Control Inputs
Pin Function
OEB_all
OEB0
OEB1
OEB2
OEB3
Description
Output Enable All.
All outputs enabled when low.
Output Enable Bank 0.
CLK0A/0B enabled when low.
Output Enable Bank 1.
CLK1A/1B enabled when low.
Output Enable Bank 2.
CLK2A/2B enabled when low.
Output Enable Bank 3.
CLK3A/3B enabled when low.
Assignable Pin Name
P1, P2, P3, P5*, P6*
P1, P2, P3, P5*, P6*
P1, P2, P3, P5*, P6*
P1, P2, P3, P5*, P6*
P1, P2, P3, P5*, P6*
Rev. 1.4
23