SI5335 Datasheet, PDF (21/47 Pages) Silicon Laboratories – WEB-CUSTOMIZABLE, ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR/BUFFER

Si5335
3.4.2.3. CML Input Clocks
CML signals may be applied to the differential inputs of the Si5335. Since the Si5335 differential inputs are
internally self-biased, a CML signal may not be dc-coupled to the device.
The recommended configurations for interfacing a CML input signal to the Si5335 are shown in Figure 8. The
100  resistor provides line termination, and, since the receiver is internally-biased, no additional external biasing
components are required.
CML
Keep termination close to
input pin of the Si5335
0.1 uF
50
100
50
0.1 uF
Pin 1
Pin 2
Si5335
Must be ac coupled
Figure 8. CML Input Signal
3.4.2.4. HCSL Input Clocks
A typical HCSL driver has an open source output, which requires an external series resistor and a resistor to
ground. The values of these resistors depend on the driver but are typically equal to 33  (Rs) and 50  (Rt). Note
that the HCSL driver in the Si5335 requires neither Rs nor Rt resistors. Other than two ac-coupling capacitors, no
additional external components are necessary when interfacing an HCSL signal to the Si5335.
3.3V, 2.5V, 1.8V
Rs
50
Rs
HCSL
50
Rt
Rt
0.1 uF
0.1 uF
Must be ac coupled
Pin 1
Pin 2
Si5335
Figure 9. HCSL Input Signal to Si5335
Rev. 1.4
21