K4C89363AF Datasheet, PDF (54/58 Pages) Samsung semiconductor – 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM

K4C89363AF
• Regular Mode Register/Extended Mode Register change bits (BA0, BA1)
These bits are used to choose either Regular MRS or Extended MRS
BA1
0
0
1
BA0
0
1
X
A14~A0
Regular MRS cycle
Extended MRS cycle
Reserved
Regular Mode Register Fields
(R-1) Burst Length field (A2 to A0)
This field specifies the data length for column access using the A2 to A0 pins and sets the Burst Length to be 2 or 4
words.
A2
A1
A0
Burst Length
0
0
0
Reserved
0
0
1
2 words
0
1
0
4 words
0
1
1
Reserved
1
X
X
Reserved
(R-2) Burst Type field (A3)
This Burst Type can be chosen Interleave mode or Sequential mode. When the A3 bit is " 0", Sequential mode is
selected. When the A3 bit is "1", Interleave mode is selected. Both burst types support burst length of 2 and 4 words.
A3
Burst Type
0
Sequential
1
Interleave
• Addressing sequence of Sequential mode (A3)
A column access is started from the inputted lower address and is performed by incrementing the lower address input to
the device.
C A S Latency = 4 (Free Running QS mode)
CK
CK
Command
RDA
LAL
QS
DQ
Data 0 Data 1 Data 2 Data 3
Addressing sequence for Sequential mode
Data
Data 0
Data 1
Data 2
Data 3
Access Address
n
n+1
n+2
n+3
Burst Length
2 words (Address bits is LA0)
not carried from LA0~LA1
4 words(Address bits is LA1, LA0)
not carried from LA1~LA2
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REV. 0.0 Nov. 2002