K4C89363AF Datasheet, PDF (42/58 Pages) Samsung semiconductor – 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM

K4C89363AF
Power Down Timing (CL=4, BL=4)
Write cycle to Power Down Mode
CLK
0
1
2
3
4
5
6
7
8
9
10
n-1
n
n+1
n+2
n+3
CLK
I_{P D A}
Command
WRA
LAL
DESL
DESL
RoDrA
WRA
Address
UA
LA
PD
Unidirectional DS/QS mode
LDS/UDS
(Input)
LQS/UQS
(Output)
DQ
(Output)
Low
WL=3
WL=3
t_{I S}
I_PD =2 cycle
t _IH
I_{P D} =2 cycle
D0 D1 D2 D3
I_{R C ( m i n ) ,} t_{R E F I ( m a x )}
UA
t_PDEX
Unidirectional DS/Free Running QS mode
LDS/UDS
(Input)
LQS/UQS
(Output)
DQ
(Output)
WL=3
D0 D1 D2 D3
Note : PD must be kept "High" level until end of Burst data output.
P D s h o u l d b e b r o u g h t t o " H i g h " w i t h i n t_{R E F I} (max.) to maintain the data written into cell.
In Power Down Mode, PD "Low" and a stable clock signal must be maintained.
W h e n PD is brought to "High", a valid executable command may be applied I _{P D A} cycles later.
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REV. 0.0 Sep. 2002