K4C89363AF Datasheet, PDF (48/58 Pages) Samsung semiconductor – 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM

K4C89363AF
Self-Refresh Entry Timing
Unidirectional DS/QS mode
0
1
2
CLK
CLK
l_{R C D} = 1 c y c l e s
Command
PD
WRA
REF
t_{F P D L ( m i n )} t _{F P D L ( m a x )}
LQS/UQS
(output)
t_{Q P D H}
LOW
3
4
5
6
l_{R E F C}
DESL
Auto Refresh
Self Refresh Entry
l
P
D
*
V
2
l_{C K D}
7
8
9
10
11
Hi-Z
DQ
(output)
Qx
Hi-Z
Note : 1.
is don’t care.
2. PD must be brought to "Low" within the timing between t_{F P D L} (min) and t _FPDL(max) to Self
Refresh mode. When PD is brought to "Low" after I_{P D V}, K4C89183AD perform Auto Refresh and enter
Power down mode.
3. It is desirable that clock input is continued at least I_{C K D} from REF command even though PD is
brought to "Low" for Self-Refresh Entry.
Self-Refresh Exit Timing
Unidirectional DS/QS mode
0
1
CLK
3
m-1
m
CLK
*2
l_{R E F C}
Command
*3
DESL
l_{P D A =}2 c y c l e s^{* 4}
W R A ^*5 R E F^{* 5}
l_{R C D =} 1cycle
m+1
m+2
l_{R E F C}
DESL
n-1
n
n+1
p-1
p
Command (1st) ^*6
C o m m a n d ( 2 n d ) ^*6
RDA^*7
l_{R C D =}1cycle
L A L^{* 7}
PD
Hi-Z
LQS/UQS
(output)
t_{P D E X}
l_{L O C K}
LOW
DQ
Hi-Z
(output)
Self-Refresh Exit
Note : 1.
is don’t care.
2. Clock should be stable prior to PD = "High" if clock input is suspended in Self-Refresh mode.
3. DESL command must be asserted during I _REFC after PD is brought to "High"
4. l_{P D A} is defined from the first clock rising edge after PD is brought to "High"
5. It is desirable that one Auto-Refresh command is issued just after Self-Refresh Exit before any other
operation.
6. Any command (except Read command) can be issued after l_REFC.
7. Read command (RDA +LAL) can be issued after l_LCOK.
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REV. 0.0 Sep. 2002